The present application relates to semiconductor device fabrication, and particularly, to the integration of non-volatile memory (NVM) devices and complementary metal oxide semiconductor (CMOS) devices on a single substrate.
NVM devices, such as EEPROM and flash memory, are used in computer and other electronic devices to store date and/or programming instructions that can be electrically erased and re-programmed and that must be saved when power is removed. It is beneficial to integrate NVM devices into a CMOS logic circuitry for high performance CPU, FPGA or neural network. Current advanced logic technology is typically accomplished using a replacement gate (also called gate-last) process flow in which temporary gate material (typically polysilicon) is removed and replaced with a metal gate. Integrating the NVM device with CMOS transistors having the metal gate and the high-k gate dielectric on the same integrated circuit usually requires many additional processing steps. Therefore, a method that allows effectively integrating NVM devices and CMOS devices in a replacement gate process flow is highly desirable.